Powerful bus function
The controller of the VME bus maps each address space to memory. Usually, the memory on the controller board goes to address 0, and the controller board I/O goes to the high end of the memory. The middle address is used to map the address on the VME bus. VME bus supports DMA transfer; VME bus card cage can contain up to 21 slots, the first slot must be the bus controller; VME bus adopts the master-slave structure, VME bus allows multiple master devices and multiple slave devices, general bus controller by the master device concurrently; VME bus is based on TTL level, asynchronous (no central synchronous clock signal), data transmission speed up to 20MBYTES/s, support data read, write, modify, block transfer and other operations, and support a variety of speed of external devices; Bus transmission error detection (BERR*), bus polarity protection function; Has a flexible interrupt control scheme, 7 priority interrupt system; System diagnostic capability (SYSFAIL), physical addressing, hot swap, plug and play, bus locking, first slot detection, etc.